Struct List

Here are the structs with brief descriptions:

[detail level 123]

NACPI	Abstracts the ACPI standard that provides interfaces for hardware detection, device configuration, and energy management
NMADS
CLAPIC	Processor Local APIC (LAPIC) Structure
CIOAPIC	I/O APIC Structure
CInterrupt_Source_Override	Interrupt Source Override Structure
CLAPIC_Address_Override	Local APIC Address Override Structure
CLAPIC_Address_Override.__unnamed0__.__unnamed0__
CRSDP	Root System Description Pointer (RSDP)
CSDTH	System Description Table Header (SDTH)
CRSDT	Root System Description Table (RSDT)
CXSDT	Extended System Description Table (XSDT)
CSubHeader	Helper structure
CMADT	Multiple APIC Description Table (MADT)
CAddress	ACPI address format
NCPUID	Query information about the processor
CReg.__unnamed0__
NFPU	For the sake of simplicity we call it just FPU, although this is for MMX and SSE as well
CState	512 byte structure for FPU / MMX / SSE registers corresponds to the layout used by the instructions fxsave and fxrstor
CST	80 bit registers for FPU stack / MMX
CXMM	128 bit SSE registers
CState.__unnamed0__.__unnamed0__
CState.__unnamed1__.__unnamed0__
CState.st
NGDT	Abstracts the GDT that, primarily, contains descriptors to memory segments
CPointer	Structure that describes a GDT Pointer (aka GDT Descriptor)
CSegmentDescriptor.__unnamed0__
CSegmentDescriptor.__unnamed1__	Fields specific for Code Segment (for debugging purposes)
CSegmentDescriptor.__unnamed2__	Fields specific for Data Segment (for debugging purposes)
NHPET	Abstraction of the HPET existing in "modern" computers (since ~2005)
CHPET_ACPI	The ACPI 2.0 HPET Description Table (HPET)
CCapabilitiesAndIdRegister.__unnamed0__
CConfigurationRegister.__unnamed0__
NIDT	"Interrupt Descriptor Table (IDT)
CInterruptDescriptor
CRegister
CInterruptDescriptor.__unnamed0__.__unnamed0__
NIOAPIC	Abstraction of the I/O APIC that is used for management of external interrupts
CIdentification.__unnamed0__
NLAPIC	Abstracts the local APIC (which is integrated into every CPU core)
NIPI	Inter-Processor Interrupts
CInterruptCommand.__unnamed0__
CInterruptCommand.__unnamed1__	I/O redirection-table entry
NTimer	Local Timer (for each LAPIC / CPU)
CControlRegister.__unnamed0__
CIdentificationRegister.__unnamed0__
CVersionRegister.__unnamed0__
CLogicalDestinationRegister.__unnamed0__
CDestinationFormatRegister.__unnamed0__
CTaskPriorityRegister.__unnamed0__
CSpuriousInterruptVectorRegister.__unnamed0__
NMultiboot	Interface for Multiboot
CVBE	Video mode: Vesa BIOS Extension
CFramebuffer	Video mode: Framebuffer
CFramebuffer.__unnamed0__.__unnamed0__	For INDEXED type
CFramebuffer.__unnamed0__.__unnamed1__	For RGB type
NPIT	Abstraction of the historical Programmable Interval Timer (PIT)
CMode.__unnamed0__
CControl.__unnamed0__	I/O-port bitmap for the NMI Status and Control Register
CCursor.__unnamed0__
CDateTime	Date and Time
CDebugContext	Debug context (stored on stack during GDB interrupt)
CInterruptContext	Preserved interrupt context
CKey	Class that abstracts a key, made up of the scan code and the modifier bits
Cmultiboot_info	Multiboot Information Structure according to Specification
CArray	Helper Structure
Cmultiboot_info.__unnamed0__.aout_symbol_table	Symbol table for kernel in a.out format
Cmultiboot_info.__unnamed0__.elf_section_header_table	Section header table for kernel in ELF
Cmultiboot_info.mem	Available memory retrieved from BIOS
CPointer	Mouse state
CStackPointer	Structure for saving the stack pointer when switching coroutines